While electronic signals continue to be sampled, stored, manipulated and transmitted in digital form, certain applications and hardware still require an analog signal as an input. This is particularly true for computer monitors. The typical VGA computer monitor still requires a color VGA analog input to drive the display. Presently, this analog signal is provided by video color pallet digital-to-analog converter (DAC).
The general family of DACs includes both voltage scaling, charge scaling and current scaling designs. In each of these types of DACs, a number of binary weighted circuits are selectively summed at a common node according to a digital input. Due to changes in node voltages, voltage scaling DACs produce switching transients that can result in conversion errors unless an appropriate settling time is taken into consideration.
Current scaling DACs contain a number of switchable current sources that selectively switch an output current into a current summing node in response to a digital input signal. Each switchable current source can be conceptualized as having a current source, and a current switch. The current source functions to provides a binary weighted output current. In the prior art it is known to use current mirrors as current sources. Improved current mirrors are set forth in U.S. Pat. No. 3,936,725 issued to Herbert A. Schneider on Feb. 3, 1976. The current switch, positioned between the current source and the summing node, switches the output current into the summing node according to the digital input. The summation of binary weighted output currents from the various switchable current sources provides an analog of the digital input received by the DAC. For accuracy in the digital-to-analog conversion it is essential that each switchable current source, when switched on, provide a reliable, precise output current to the summing node. Accordingly, it would be desirable to have a switchable current source with a current magnitude determining circuit that is isolated from the current switch.
Current scaling DACs also have an additional drawback in the form of output transients that can appear on the summing output node, often called glitches. Glitches originate during the conversion process as some current sources are switched on (and into the output node) while others are switched off. Some of the factors believed to give rise to glitches are switch on time differences, unequal delays, and/or the unequal or changing currents among the switchable current sources. To reduce the effect of transients in current scaling DACs it is known to provide a decoding scheme to reduce the effect of severe transitions resulting from certain binary inputs. For example, in an eight bit DAC having no decoding scheme, the transition from 127 (binary 01111111) to 128 (binary 10000000) would result in the shutting off of seven smaller current sources as the largest one is turned on. With a decoding scheme these effects are reduced by spreading such transitions over the range of the binary inputs. Complex decoding schemes can be arrived at that provide smoother transitions, but such arrangements require more die area to accommodate the decoding circuitry. Such a decoding circuit is set forth in U.S. Pat. No. 4,904,922 issued to Joseph H. Colles on Feb. 27, 1990.
The switching action of a given individual switchable current source can also contribute to, or generate by itself, output transients. Output transients are particularly bothersome to video DACs because they can result in distracting anomalies on the video display screen.
Other prior art methods to reduce output transients have focused on minimizing the switching delays between the weighted current sources. However, in extremely fast DACs, there is a finite limit to this type of approach due to integrated circuit size and the fabrication process employed. Other attempts to reduce output transients have included sample-and-hold circuits that sample the DAC output after any potential transients have passed. In many cases such solutions are impractical due to the amount of space required for such circuits and/or the conversion speed required for a given application.
Accordingly, it would be desirable to have a fast DAC switchable current source that reduces output transients and does not require a large amount of additional devices, or a complex fabrication process. To the inventor's knowledge, no prior art switchable current source has been provided that meets these needs.